Sign in
Author
|
Conference
|
Journal
|
Organization
|
Year
|
DOI
Look for results that meet for the following criteria:
since
equal to
before
between
and
Search in all fields of study
Limit my searches in the following fields of study
Agriculture Science
Arts & Humanities
Biology
Chemistry
Computer Science
Economics & Business
Engineering
Environmental Sciences
Geosciences
Material Science
Mathematics
Medicine
Physics
Social Science
Multidisciplinary
Co-authors
(22)
S. Brad Herner
4
S. R. Radigan
3
M. Mahajani
3
Shun-yun Hu (胡舜元)
3
Christopher Petti
3
Conferences
(1)
VLSIT
1
Journals
(3)
ELECTROCHEM SOLID STATE LETT
1
IEEE ELECTRON DEV LETT
1
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures
1
Keywords
(9)
Embed
Subscribe
Academic
Authors
V. L. Eckert
V. L. Eckert,Electrical & Electronic Engineering
Edit
V. L. Eckert
Publications:
4
|
Citations:
46
Fields:
Electrical & Electronic Engineering
View FAQ about top research areas and Fields of study
Collaborated with
22 co-authors
from 2003 to 2006
|
Cited by
198 authors
Cumulative
Annual
Sort by:
Publications
(4)
BibTeX
|
RIS
|
RefWorks
Download
Dopant Diffusion Barrier Properties of Ultrathin, Chemically Grown Oxide Films
S. B. Herner
,
V. L. Eckert
Journal:
Electrochemical and Solid State Letters - ELECTROCHEM SOLID STATE LETT
, vol. 9, no. 2, 2006
Three-dimensional thin-film-transistor silicon-oxide-nitride-oxide-silicon memory cell formed on large grain sized polysilicon films using nuclei induced solid phase crystallization
(
Citations: 2
)
S. Gu
,
S. V. Dunton
,
A. J. Walker
,
S. Nallamothu
,
E. H. Chen
,
M. Mahajani
,
S. B. Herner
,
V. L. Eckert
,
S. Hu
,
M. Konevecki
,
C. Petti
,
S. Radigan
http://academic.research.microsoft.com/io.ashx?type=5&id=44233862&selfId1=20982227&selfId2=0&maxNumber=12&query=
Journal:
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures
, vol. 23, no. 5, 2005
Vertical p-i-n polysilicon diode with antifuse for stackable field-programmable ROM
(
Citations: 18
)
S. B. Herner
,
A. Bandyopadhyay
,
S. V. Dunton
,
V. Eckert
,
J. Gu
,
K. J. Hsia
,
S. Hu
,
C. Jahn
,
D. Kidwell
,
M. Konevecki
,
M. Mahajani
,
C. Petti
http://academic.research.microsoft.com/io.ashx?type=5&id=27063477&selfId1=20982227&selfId2=0&maxNumber=12&query=
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 25, no. 5, pp. 271-273, 2004
3D TFT-SONOS memory cell for ultra-high density file storage applications
(
Citations: 26
)
A. J. Walker
,
S. Nallamothu
,
E.-H. Chen
,
M. Mahajani
,
S. B. Herner
,
M. Clark
,
J. M. Cleeves
,
S. V. Dunton
,
V. L. Eckert
,
J. Gu
,
S. Hu
,
J. Knall
http://academic.research.microsoft.com/io.ashx?type=5&id=50314690&selfId1=20982227&selfId2=0&maxNumber=12&query=
Conference:
VLSI Technology, Symposium - VLSIT
, 2003
Sort by:
Citations
(46 times by 45 publications)
Charge-Trapping-Induced Parasitic Capacitance and Resistance in SONOS TFTs Under Gate Bias Stress
Chia-Sheng Lin
,
Ying-Chung Chen
,
Ting-Chang Chang
,
Fu-Yen Jian
,
Hung-Wei Li
,
Shih-Ching Chen
,
Ying-Shao Chuang
,
Te-Chih Chen
,
Ya-Hsiang Tai
,
Ming-Hsien Lee
,
Jim-Shone Chen
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 32, no. 3, pp. 321-323, 2011
Bidirectional Two-Terminal Switching Device for Crossbar Array Architecture
Yun Heub Song
,
Seung Young Park
,
Jung Min Lee
,
Hyung Jun Yang
,
Gyu Hyun Kil
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 32, no. 8, pp. 1023-1025, 2011
Amorphous silicon charge storage layer of nonvolatile memory with trigate nanowires structure
Hung-Bin Chen
,
Yung-Chun Wu
,
Lun-Jyun Chen
,
Ji-Hong Chiang
,
Min-Feng Hung
,
Chao-Kan Yang
,
Chun-Yen Chang
Conference:
IEEE International Nanoelectronics Conference - INEC
, pp. 1-2, 2011
Impacts of Poly-Si Nanowire Shape on Gate-All-Around Flash Memory With Hybrid Trap Layer
Hung-Bin Chen
,
Yung-Chun Wu
,
Chao-Kan Yang
,
Lun-Chun Chen
,
Ji-Hong Chiang
,
Chun-Yen Chang
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 32, no. 10, pp. 1382-1384, 2011
Comprehensive Study of Pi-Gate Nanowires Poly-Si TFT Nonvolatile Memory With an HfO $_2$ Charge Trapping Layer
Lun-Jyun Chen
,
Yung-Chun Wu
,
Ji-Hong Chiang
,
Min-Feng Hung
,
Chin-Wei Chang
,
Po-Wen Su
Journal:
IEEE Transactions on Nanotechnology - IEEE TRANS NANOTECHNOL
, vol. 10, no. 2, pp. 260-265, 2011
Comments