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Co-authors
(25)
Patrick Leduc
2
Rockford J. Ross
1
Lorena Anghel
1
L. L. Chapelon
1
Christopher A. Fuchs
1
Conferences
(1)
IPFA
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MICROELECTRON ENG
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Keywords
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Authors
F. Lorut
F. Lorut,Electrical & Electronic Engineering,Nanotechnology
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F. Lorut
Publications:
3
|
Citations:
10
Fields:
Electrical & Electronic Engineering
,
Nanotechnology
View FAQ about top research areas and Fields of study
Collaborated with
25 co-authors
from 2005 to 2011
|
Cited by
46 authors
Cumulative
Annual
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Publications
(3)
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RefWorks
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Resistance increase due to electromigration induced depletion under TSV
T. Frank
,
C. Chappaz
,
P. Leduc
,
L. Arnaud
,
F. Lorut
,
S. Moreau
,
A. Thuaire
,
R. El Farhane
,
L. Anghel
Published in 2011.
RF characterization and modelling of high density Through Silicon Vias for 3D chip stacking
(
Citations: 4
)
L. Cadix
,
C. Bermond
,
C. Fuchs
,
A. Farcy
,
P. Leduc
,
L. DiCioccio
,
M. Assous
,
M. Rousseau
,
F. Lorut
,
L. L. Chapelon
,
B. Flechet
,
N. Sillon
http://academic.research.microsoft.com/io.ashx?type=5&id=26442063&selfId1=21973588&selfId2=0&maxNumber=12&query=
Journal:
Microelectronic Engineering - MICROELECTRON ENG
, vol. 87, no. 3, pp. 491-495, 2010
How effective are failure analysis methods for the 65nm CMOS technology node?
(
Citations: 6
)
M. Lamy
,
F. Lorut
,
M. de la Bardonnie
,
R. Ross
,
K. Ly
,
C. Wyon
,
L. F. T. Kwakman
Conference:
International Symposium on Physical & Failure Analysis of Integrated Circuits - IPFA
, 2005
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Citations
(10 times by 10 publications)
Modelling of through silicon via and devices electromagnetic coupling
Mohamed Abouelatta-Ebrahim
,
Rabah Dahmani
,
Olivier Valorge
,
Francis Calmon
,
Christian Gontrand
Journal:
Microelectronics Journal
, vol. 42, no. 2, pp. 316-324, 2011
RF Model and Verification of Through-Silicon Vias in Fully Integrated SiGe Power Amplifier
Hsien-Yuan Liao
,
Hwann-Kaeo Chiou
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 32, no. 6, pp. 809-811, 2011
RF Characterization and Analytical Modelling of Through Silicon Vias and Coplanar Waveguides for 3D Integration
(
Citations: 2
)
Yann P. R. Lamy
,
K. B. Jinesh
,
Fred Roozeboom
,
Dirk J. Gravesteijn
,
Wim F. A. Besling
Journal:
IEEE Transactions on Advanced Packaging - IEEE TRANS ADV PACKAG
, vol. 33, no. 4, pp. 1072-1079, 2010
Developing digital test sequences for through-silicon vias within 3D structures
Matthias Gulbins
,
Fabian Hopsch
,
Peter Schneider
,
Bernd Straube
,
Wolfgang Vermeiren
Conference:
IEEE International Conference on 3D System Integration - 3DIC
, 2010
Applications of scanning near-field photon emission microscopy
D. V. Isakov
,
B. W. M. Tan
,
J. C. H. Phang
,
Y. C. Yeo
,
A. A. B. Tio
,
Y. Zhang
,
T. Geinzer
,
L. J. Balk
Conference:
International Symposium on Physical & Failure Analysis of Integrated Circuits - IPFA
, pp. 631-634, 2009
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