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Co-authors
(20)
Min-Lin Wu
23
Yung-Hsien Wu
23
Lun-Lun Chen
19
Chia-Chun Lin
14
Rong-Jhe Lyu
4
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(2)
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Authors
Jia-Rong Wu
Jia-Rong Wu,National Tsing Hua University Taiwan,Electrical & Electronic Engineering,Physics,Nanotechnology
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Jia-Rong Wu
National Tsing Hua University Taiwan
Publications:
26
|
Citations:
7
Fields:
Electrical & Electronic Engineering
,
Physics
,
Nanotechnology
View FAQ about top research areas and Fields of study
Collaborated with
20 co-authors
from 1998 to 2012
|
Cited by
20 authors
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Publications
(26)
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$\hbox{ZrTiO}_{x}$Based Resistive Memory With MIS Structure Formed on Ge Layer
Yung-Hsien Wu
,
Jia-Rong Wu
,
Chin-Yao Hou
,
Chia-Chun Lin
,
Min-Lin Wu
,
Lun-Lun Chen
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 33, no. 3, pp. 435-437, 2012
MIM Capacitors With Crystalline$\hbox{TiO}_{2}/ \hbox{SiO}_{2}$ Stack Featuring High Capacitance Density and Low Voltage Coefficient
Yung-Hsien Wu
,
Wei-Yuan Ou
,
Chia-Chun Lin
,
Jia-Rong Wu
,
Min-Lin Wu
,
Lun-Lun Chen
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 33, no. 1, pp. 104-106, 2012
Effect of Nitrogen Passivation on the Performance of MIM Capacitors With a Crystalline $\hbox{TiO}_{2}/\hbox{SiO}_{2}$ Stacked Insulator
Jia-Rong Wu
,
Yung-Hsien Wu
,
Chia-Chun Lin
,
Wei-Yuan Ou
,
Min-Lin Wu
,
Lun-Lun Chen
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 33, no. 6, pp. 878-880, 2012
MOS Devices With High-κ (ZrO$_2$) $_x$(La $_2$O$_3$) $_{1-x}$ Alloy as Gate Dielectric Formed by Depositing ZrO $_2$/La$_2$O $_3$/ZrO$_2$ Laminate and Annealing
Yung-Hsien Wu
,
Lun-Lun Chen
,
Rong-Jhe Lyu
,
Jia-Rong Wu
,
Min-Lin Wu
,
Chia-Chun Lin
Journal:
IEEE Transactions on Nanotechnology - IEEE TRANS NANOTECHNOL
, vol. 11, no. 3, pp. 483-491, 2012
Robust Automatic Rodent Brain Extraction Using 3-D Pulse-Coupled Neural Networks (PCNN)
Nigel Chou
,
Jiarong Wu
,
Jordan Bai Bingren
,
Anqi Qiu
,
Kai-Hsiang Chuang
Journal:
IEEE Transactions on Image Processing
, vol. 20, no. 9, pp. 2554-2564, 2011
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Citations
(7 times by 5 publications)
Lanthanum-Oxide-Doped Nitride Charge-Trap Layer for a TANOS Memory Device
Jong Kyung Park
,
Youngmin Park
,
Seok-Hee Lee
,
Sung Kyu Im
,
Jae Sub Oh
,
Moon Sig Joo
,
Kwon Hong
,
Byung Jin Cho
Journal:
IEEE Transactions on Electron Devices - IEEE TRANS ELECTRON DEVICES
, vol. 58, no. 10, pp. 3314-3320, 2011
Comparison of Ge Surface Passivation Between $ \hbox{SnGeO}_{x}$ Films Formed by Oxidation of Sn/Ge and $ \hbox{SnGe}_{x}/\hbox{Ge}$ Structures
Yung-Hsien Wu
,
Min-Lin Wu
,
Rong-Jhe Lyu
,
Jia-Rong Wu
,
Chia-Chun Lin
,
Lun-Lun Chen
Journal:
IEEE Electron Device Letters - IEEE ELECTRON DEV LETT
, vol. 32, no. 5, pp. 611-613, 2011
Fluorinated $\hbox{SrTiO}_{3}$ as Charge-Trapping Layer for Nonvolatile Memory Applications
X. D. Huang
,
Johnny K. O. Sin
,
P. T. Lai
Journal:
IEEE Transactions on Electron Devices - IEEE TRANS ELECTRON DEVICES
, vol. 58, no. 12, pp. 4235-4240, 2011
A method for stochastic multiple criteria decision making based on dominance degrees
Yang Liu
,
Zhi-Ping Fan
,
Yao Zhang
Journal:
Information Sciences - ISCI
, vol. 181, no. 19, pp. 4139-4153, 2011
Ge-Based Silicon–Oxide–Nitride–Oxide–Silicon-Type Nonvolatile Memory Formed on Si Substrate
(
Citations: 1
)
Yung-Hsien Wu
,
Jia-Rong Wu
,
Min-Lin Wu
,
Lun-Lun Chen
,
Yuan-Sheng Lin
Journal:
Journal of The Electrochemical Society - J ELECTROCHEM SOC
, vol. 156, no. 12, 2009
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