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Co-authors
(53)
Feng Pan
2
Liping Peng
2
Man Lung Mui
2
James K. Lan
2
Ken Oowada
2
Conferences
(1)
ISSCC
1
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(1)
IEEE J SOLID-STATE CIRCUITS
1
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Authors
Tien-Chien Kuo
Tien-Chien Kuo,Electrical & Electronic Engineering
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Tien-Chien Kuo
Publications:
2
|
Citations:
16
Fields:
Electrical & Electronic Engineering
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Collaborated with
53 co-authors
from 2008 to 2009
|
Cited by
82 authors
Cumulative
Annual
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Publications
(2)
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RefWorks
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A 16 Gb 3Bit Per Cell (X3) NAND Flash Memory on 56 nm Technology With 8 MB/s Write Rate
(
Citations: 6
)
Yan Li
,
Seungpil Lee
,
Yupin Fong
,
Feng Pan
,
Tien-Chien Kuo
,
Jongmin Park
,
Tapan Samaddar
,
Man L. Mui
,
Khin Htoo
,
Teruhiko Kamei
,
Masaaki Higashitani
,
Emilio Yero
http://academic.research.microsoft.com/io.ashx?type=5&id=27053252&selfId1=22335118&selfId2=0&maxNumber=12&query=
Journal:
IEEE Journal of Solid-state Circuits - IEEE J SOLID-STATE CIRCUITS
, vol. 44, no. 1, pp. 195-207, 2009
A 16Gb 3b/ Cell NAND Flash Memory in 56nm with 8MB/s Write Rate
(
Citations: 10
)
Yan Li
,
Seungpil Lee
,
Yupin Fong
,
Feng Pan
,
Tien-Chien Kuo
,
Jong Park
,
T. Samaddar
,
Hao Nguyen
,
Man Mui
,
Khin Htoo
,
T. Kamei
,
M. Higashitani
http://academic.research.microsoft.com/io.ashx?type=5&id=50647787&selfId1=22335118&selfId2=0&maxNumber=12&query=
Conference:
Solid-State Circuits IEEE International Conference - ISSCC
, 2008
Sort by:
Citations
(16 times by 14 publications)
On the Use of Soft-Decision Error-Correction Codes in nand Flash Memory
(
Citations: 1
)
Guiqiang Dong
,
Ningde Xie
,
Tong Zhang
Journal:
IEEE Transactions on Circuits and Systems I-regular Papers - IEEE TRANS CIRCUIT SYST-I
, vol. 58, no. 2, pp. 429-439, 2011
A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology
Ki-Tae Park
,
Ohsuk Kwon
,
Sangyong Yoon
,
Myung-Hoon Choi
,
In-Mo Kim
,
Bo-Geun Kim
,
Min-Seok Kim
,
Yoon-Hee Choi
,
Seung-Hwan Shin
,
Youngson Song
,
Joo-Yong Park
,
Jae-Eun Lee
http://academic.research.microsoft.com/io.ashx?type=5&id=51036628&selfId1=22335118&selfId2=0&maxNumber=12&query=
Conference:
Solid-State Circuits IEEE International Conference - ISSCC
, pp. 212-213, 2011
Using Lossless Data Compression in Data Storage Systems: Not for Saving Space
Ningde Xie
,
Guiqiang Dong
,
Tong Zhang
Journal:
IEEE Transactions on Computers - TC
, vol. 60, no. 3, pp. 335-345, 2011
Characterizing capacity achieving write once memory codes for multilevel flash memories
Ryan Gabrys
,
Lara Dolecek
Conference:
IEEE International Symposium on Information Theory - ISIT
, pp. 2517-2521, 2011
A 3bit/cell 32Gb NAND flash memory at 34nm with 6MB/s program throughput and with dynamic 2b/cell blocks configuration mode for a program throughput increase up to 13MB/s
(
Citations: 2
)
G. G. Marotta
,
A. Macerola
,
A. D'Alessandro
,
A. Torsi
,
C. Cerafogli
,
C. Lattaro
,
C. Musilli
,
D. Rivers
,
E. Sirizotti
,
F. Paolini
,
G. Imondi
,
G. Naso
http://academic.research.microsoft.com/io.ashx?type=5&id=50872247&selfId1=22335118&selfId2=0&maxNumber=12&query=
Conference:
Solid-State Circuits IEEE International Conference - ISSCC
, pp. 444-445, 2010
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