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Co-authors
(36)
Eric Rutten (Éric Rutten)
9
Jean-luc Dekeyser
8
Abdoulaye Gamatie (Abdoulaye Gamatié)
8
Jean-pierre Talpin
5
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Authors
Huafeng Yu
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Huafeng Yu
The French National Institute for Research in Computer Science and Control
Publications: 17
|
Citations: 30
|
G-Index: 4
|
H-Index: 3
The information is calculated based on the tens of millions of scholarly articles currently discoverable within Microsoft Academic Search. As more content gets indexed, the accuracy and completeness will continue to improve.
Interests:
Software Engineering
,
Real-Time & Embedded Systems
,
Programming Languages
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Collaborated with
36 co-authors
from 2006 to 2011
; Cited by
41 authors
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Publications
(17)
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System-level co-simulation of integrated avionics using polychrony
(
Citations: 3
)
Huafeng Yu
,
Yue Ma
,
Yann Glouche
,
Jean-Pierre Talpin
,
Loïc Besnard
,
Thierry Gautier
,
Paul Le Guernic
,
Andres Toom
,
Odile Laurent
Conference:
ACM Symposium on Applied Computing - SAC
, pp. 354-359, 2011
Observation of Quantum Phase Diffusion in a Small Underdamped Josephson Junction
H. F. Yu
,
X. B. Zhu
,
Z. H. Peng
,
Ye Tian
,
D. J. Cui
,
G. H. Chen
,
D. N. Zheng
,
X. N. Jing
,
Li Lu
,
S. P. Zhao
,
Siyuan Han
Published in 2011.
Polychronous controller synthesis from MARTE CCSL timing specifications
Huafeng Yu
,
Jean-Pierre Talpin
,
Loic Besnard
,
Thierry Gautier
,
Herve Marchand
,
Paul Le Guernic
Conference:
International Conference on Formal Methods and Models for Co-Design - MEMOCODE
, 2011
System synthesis from AADL using Polychrony
Yue Ma
,
Huafeng Yu
,
Thierry Gautier
,
Jean-Pierre Talpin
,
Loic Besnard
,
Paul Le Guernic
Conference:
Electronic System Level Synthesis Conference - ESLsyn
, 2011
Polychronous controller synthesis from MARTE CCSL timing specifications
Huafeng Yu
,
Jean-Pierre Talpin
,
Thierry Gautier Herv
,
INRIA Rennes
Published in 2011.
Order by:
Citations
(30 times by 23 publications)
From design-time concurrency to effective implementation parallelism: The multi-clock reactive case
V. Papailiopoulou
,
D. Potop-Butucaru
,
Y. Sorel
,
R. de Simone
,
L. Besnard
,
J.-P. Talpin
Conference:
Electronic System Level Synthesis Conference - ESLsyn
, 2011
System synthesis from AADL using Polychrony
Yue Ma
,
Huafeng Yu
,
Thierry Gautier
,
Jean-Pierre Talpin
,
Loic Besnard
,
Paul Le Guernic
Conference:
Electronic System Level Synthesis Conference - ESLsyn
, 2011
FPGA physical-design automation using Model-Driven Engineering
Ciprian Teodorov
,
Damien Picard
,
Loic Lagadec
Conference:
International Workshop on Reconfigurable Communication-Centric Systems-on-Chip - ReCoSoC
, 2011
Parametric design and optimization platform — Case study: Rectifiers with near sinusoidal input currents
Adriana Sirbu
Conference:
International Symposium on Signals, Circuits and Systems - ISSCS
, 2011
Array-OL with delays, a domain specific specification language for multidimensional intensive signal processing
(
Citations: 1
)
Calin Glitia
,
Philippe Dumont
,
Pierre Boulet
Journal:
Multidimensional Systems and Signal Processing - MULTIDIMENSION SYST SIGN PROC
, vol. 21, no. 2, pp. 105-131, 2010
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