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Co-authors
(32)
Jiun-In Guo
17
Hsiu-Cheng Chang
9
Ching-Hwa Cheng
7
Jia-Wei Chen
6
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Authors
Cheng-An Chien
Cheng-An Chien,National Chung Cheng University,Hardware & Architecture,Engineering,Real-Time & Embedded Systems
Edit
Cheng-An Chien
National Chung Cheng University
Publications:
18
|
Citations:
7
Fields:
Hardware & Architecture
,
Engineering
,
Real-Time & Embedded Systems
View FAQ about top research areas and Fields of study
Collaborated with
32 co-authors
from 2006 to 2011
|
Cited by
20 authors
Cumulative
Annual
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Publications
(18)
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Low complexity 3D depth map generation for stereo applications
(
Citations: 1
)
Cheng-An Chien
,
Cheng-Yen Chang
,
Jui-Sheng Lee
,
Jia-Hou Chang
,
Jiun-In Guo
Published in 2011.
A 0.5V 25Mpixels/s SVGA 30fps H.264 video decoder chip
Jia-Wei Chen
,
Pei-Yao Chang
,
Keng-Jui Chang
,
Tzu-Yuan Kuo
,
Wei-Han Hsu
,
Jinn-Shyan Wang
,
Cheng-An Chien
,
Hsiu-Cheng Chang
,
Jiun-In Guo
Conference:
International Symposium on Integrated Circuits - ISIC
, 2011
Multi-core software/hardware co-debug platform with ARM CoreSight™, on-chip test architecture and AXI/AHB bus monitor
Jiff Kuo Alan P. Su
,
Kuen-Jong Lee
,
Ing-Jer Huang
,
Guo-An Jian
,
Cheng-An Chien
,
Jiun-In Guo
,
Chien-Hung Chen
Conference:
International Symposium on VLSI Design, Automation and Test - VLSI-DAT
, pp. 1-6, 2011
An AVS/H.264 dual mode video decoder targeted at high definition video applications
Cheng-An Chien
,
Yao-Chang Yang
,
Feng-Ming Yang
,
Jia-Wai Chen
,
Hsiu-Cheng Chang
,
Jiun-In Guo
Conference:
International Symposium on VLSI Design, Automation and Test - VLSI-DAT
, pp. 1-4, 2011
A H.264/MPEG2 dual mode video decoder chip supporting temporal/spatial scalable video
Cheng-An Chien
,
Yao-Chang Yang
,
Hsiu-Cheng Chang
,
Jia-Wei Chen
,
Cheng-Yen Chang
,
Jiun-In Guo
,
Jinn-Shyan Wang
,
Ching-Hwa Cheng
Conference:
Asia and South Pacific Design Automation Conference - ASP-DAC
, pp. 73-74, 2011
Sort by:
Citations
(7 times by 7 publications)
Multi-core software/hardware co-debug platform with ARM CoreSight™, on-chip test architecture and AXI/AHB bus monitor
Jiff Kuo Alan P. Su
,
Kuen-Jong Lee
,
Ing-Jer Huang
,
Guo-An Jian
,
Cheng-An Chien
,
Jiun-In Guo
,
Chien-Hung Chen
Conference:
International Symposium on VLSI Design, Automation and Test - VLSI-DAT
, pp. 1-6, 2011
A H.264/MPEG2 dual mode video decoder chip supporting temporal/spatial scalable video
Cheng-An Chien
,
Yao-Chang Yang
,
Hsiu-Cheng Chang
,
Jia-Wei Chen
,
Cheng-Yen Chang
,
Jiun-In Guo
,
Jinn-Shyan Wang
,
Ching-Hwa Cheng
Conference:
Asia and South Pacific Design Automation Conference - ASP-DAC
, pp. 73-74, 2011
48 Cycles-per-macro block deblocking filter accelerator for high-resolution H.264/AVC decoding
(
Citations: 1
)
K.-H. Chen
Journal:
Iet Circuits Devices & Systems - IET CIRCUITS DEVICES SYST
, vol. 4, no. 3, 2010
Quadruple filtering schedule for H.264/AVC deblocking filter
Kuan-Hung Chen
,
Hsiang-Pin Chen
Conference:
International Symposium on VLSI Design, Automation and Test - VLSI-DAT
, 2010
High-throughput de-blocking filter accelerator for high-resolution H.264/AVC/SVC decoding
Cheng-Hao Chen
,
Chih-Hao Chang
,
Kuan-Hung Chen
Conference:
International Symposium on Next-Generation Electronics - ISNE
, 2010
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