Co-authors (31)

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Jonas Weiss

Jonas Weiss,IBM,Electrical & Electronic Engineering,Nanotechnology

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Jonas Weiss

IBM

Publications: 18 | Citations: 75

Fields: Electrical & Electronic Engineering, Nanotechnology

Collaborated with 31 co-authors from 2003 to 2010 | Cited by 273 authors

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Publications (18)

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3D opto-electrical device stacking on CMOS

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Journal: Microelectronic Engineering - MICROELECTRON ENG , vol. 87, no. 5, pp. 1210-1212, 2010

LC PLL With 1.2Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS (Citations: 6)

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Journal: IEEE Journal of Solid-state Circuits - IEEE J SOLID-STATE CIRCUITS , vol. 44, no. 2, pp. 436-449, 2009

Antenna coupled far-infrared/THz detector in CMOS

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Journal: Electronics Letters - ELECTRON LETT , vol. 45, no. 25, 2009

A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in 65 nm Bulk CMOS With 16 dB Return Loss Over 10 GHz Bandwidth (Citations: 9)

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Journal: IEEE Journal of Solid-state Circuits - IEEE J SOLID-STATE CIRCUITS , vol. 43, no. 12, pp. 2905-2920, 2008

A T-Coil-Enhanced 8.5Gb/s High-Swing source-Series-Terminated Transmitter in 65nm Bulk CMOS (Citations: 4)

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Conference: Solid-State Circuits IEEE International Conference - ISSCC , 2008

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Citations (75 times by 65 publications)

A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS (Citations: 1)

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Conference: Solid-State Circuits IEEE International Conference - ISSCC , pp. 348-350, 2011

A 16Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology (Citations: 1)

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Conference: Custom Integrated Circuits Conference - CICC , pp. 1-4, 2011

Overview on ESD Protection Designs of Low-Parasitic Capacitance for RF ICs in CMOS Technologies (Citations: 1)

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Journal: IEEE Transactions on Device and Materials Reliability - IEEE TRANS DEVICE MATER RELIA , vol. 11, no. 2, pp. 207-218, 2011

A TX VCO for WCDMA/EDGE in 90 nm RF CMOS (Citations: 1)

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Journal: IEEE Journal of Solid-state Circuits - IEEE J SOLID-STATE CIRCUITS , vol. 46, no. 7, pp. 1618-1626, 2011

An industrial case study of analog fault modeling

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Conference: IEEE VLSI Test Symposium - VTS , pp. 178-183, 2011

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