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A fast hypergraph min-cut algorithm for circuit partitioning

A fast hypergraph min-cut algorithm for circuit partitioning,10.1016/S0167-9260(00)00008-0,Integration,Wai-kei Mak,D. F. Wong

A fast hypergraph min-cut algorithm for circuit partitioning   (Citations: 9)
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Circuit partitioning is one of the central problems in VLSI system design. The primary objective of circuit partitioning is to minimize the number of interconnections between different components of the partitioned circuit. So the circuit partitioning problem is closely related to the minimum cut problem. Recently, two very fast algorithms for computing minimum cuts in graphs were reported (Nagamochi and Ibaraki; SIAM J. Discrete Math. 5(1) (1992) 54; Stoer and Wagner, J. ACM 44(4) (1997) 585). However, it is known that a circuit netlist cannot be accurately modeled by a graph, but only by a hypergraph. In this paper, we present the fastest algorithm known today for computing a minimum cut in a hypergraph which is a non-trivial extension of the result in Stoer and Wagner (J. ACM 44(4) (1997) 586). Since the netlist of a circuit can be modeled naturally as a hypergraph, this opens the opportunity for finding very-high-quality solutions for the circuit partitioning problem. Unlike most minimum cut algorithms which rely on flow computations in a network, ours is a non-flow-based algorithm.
Journal: Integration , vol. 30, no. 1, pp. 1-11, 2000
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