Ternary computers: part I: motivation for ternary computers
In the first part, motivation is presented for a study of Ternary Computers using emulation. Areas of interest and goals of evaluation are briefly outlined.In the second part, a representation of balanced ternary numbers is presented and examined. Microcode is then written to implement parallel operation on these ternary numbers. Results of experiments are reported in order to demonstrate that the goals outlined in Part I can be achieved via emulation.Part I is based on Project MU report 32-72-MU. Part 2 is based on Project MU report 34-72-MU. These reports are not reproduced here in full for sake of brevity.