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Information Theoretic Modeling and Analysis for Global Interconnects With Process Variations

Information Theoretic Modeling and Analysis for Global Interconnects With Process Variations,10.1109/TVLSI.2009.2033933,IEEE Transactions on Very Larg

Information Theoretic Modeling and Analysis for Global Interconnects With Process Variations  
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Journal: IEEE Transactions on Very Large Scale Integration Systems - VLSI , vol. 19, no. 3, pp. 397-410, 2011
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