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Keywords
(4)
Advanced Encryption Standard
galois field
Greedy Algorithm
Smart Card
Related Publications
(8)
Powerefficient ASIC synthesis of cryptographic sboxes
An ASIC Implementation of the AES SBoxes
A Compact Rijndael Hardware Architecture with SBox Optimization
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An ASIC implementation of the AES MixColumn operation
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A Very Compact SBox for AES
A Very Compact SBox for AES,10.1007/11545262_32,David Canright
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A Very Compact SBox for AES
(
Citations: 78
)
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David Canright
A key step in the
Advanced Encryption Standard
(AES) algorithm is the "Sbox." Many implementations of AES have been pro posed, for various goals, that effect the Sbox in various ways. In partic ular, the most compact implementations to date of Satoh et al.(14) and Mentens et al.(6) perform the 8bit
Galois field
inversion of the Sbox using subfields of 4 bits and of 2 bits. Our work refines this approach to achieve a more compact Sbox. We examined many choices of ba sis for each subfield, not only polynomial bases as in previous work, but also normal bases, giving 432 cases. The isomorphism bit matrices are fully optimized, improving on the "greedy algorithm." Introducing some NOR gates gives further savings. The best case improves on (14) by 20%. This decreased size could help for arealimited hardware imple mentations, e.g., smart cards, and to allow more copies of the Sbox for parallelism and/or pipelining of AES.
Conference:
Cryptographic Hardware and Embedded Systems  CHES
, pp. 441455, 2005
DOI:
10.1007/11545262_32
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Citation Context
(63)
...This tower field approach is often used in implementations of the AES Sbox [
7
]...
Svetla Nikova
,
et al.
Secure Hardware Implementation of Nonlinear Functions in the Presence ...
...Canright has investigated very thoroughly how to implement the AES Sbox in hardware with minimal area requirements [
8
]...
...Canright investigated the hardware requirements of the AES Sbox very thoroughly in [
8
]...
...Composite field representation of the AES Sbox, as described in [
8
]...
...Similar to [15], we used Canright’s description of the AES Sbox [
8
], which is the smallest known...
Amir Moradi
,
et al.
Pushing the Limits: A Very Compact and a Threshold Implementation of A...
...This approach has received much attention in the literature, see, for example, [26], [27], [28], [29], [30], [31], [32], [
33
], [34], and [35]...
Mehran MozaffariKermani
,
et al.
A LowPower HighPerformance Concurrent Fault Detection Approach for t...
...This design was further optimized by Mentens et al. in [27] and Canright et al. in [
10
]...
Cédric Hocquet
,
et al.
Harvesting the potential of nanoCMOS for lightweight cryptography: an...
...overview of an unrolled design is shown by Fig. 2. In order to reduce the required area of our unrolled architecture, we chose the very compact unmasked Sbox by Canright [
4
] in an encryption only scenario...
Amir Moradi
,
et al.
Practical evaluation of DPA countermeasures on reconfigurable hardware
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Very Compact FPGA Implementation of the AES Algorithm
(
Citations: 98
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,
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Conference:
Cryptographic Hardware and Embedded Systems  CHES
, pp. 319333, 2003
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A Systematic Evaluation of Compact Hardware Implementations for the Rijndael SBox
(
Citations: 21
)
Nele Mentens
,
Lejla Batina
,
Bart Preneel
,
Ingrid Verbauwhede
Conference:
The Cryptographer's Track at RSA Conference  CTRSA
, pp. 323333, 2005
A 10 Gbps FullAES Crypto Design with a TwistedBDD SBox Architecture
(
Citations: 40
)
Sumio Morioka
,
Akashi Satoh
Conference:
International Conference on Computer Design  ICCD
, pp. 98103, 2002
Sort by:
Citations
(78)
Secure Hardware Implementation of Nonlinear Functions in the Presence of Glitches
(
Citations: 6
)
Svetla Nikova
,
Vincent Rijmen
,
Martin Schläffer
Journal:
Journal of Cryptology  JOC
, vol. 24, no. 2, pp. 292321, 2011
Pushing the Limits: A Very Compact and a Threshold Implementation of AES
(
Citations: 1
)
Amir Moradi
,
Axel Poschmann
,
San Ling
,
Christof Paar
,
Huaxiong Wang
Conference:
Theory and Application of Cryptographic Techniques  EUROCRYPT
, pp. 6988, 2011
A LowPower HighPerformance Concurrent Fault Detection Approach for the Composite Field SBox and Inverse SBox
Mehran MozaffariKermani
,
Arash ReyhaniMasoleh
Journal:
IEEE Transactions on Computers  TC
, vol. 60, no. 9, pp. 13271340, 2011
Harvesting the potential of nanoCMOS for lightweight cryptography: an ultralowvoltage 65 nm AES coprocessor for passive RFID tags
Cédric Hocquet
,
Dina Kamel
,
Francesco Regazzoni
,
JeanDidier Legat
,
Denis Flandre
,
David Bol
,
FrançoisXavier Standaert
Published in 2011.
Practical evaluation of DPA countermeasures on reconfigurable hardware
Amir Moradi
,
Oliver Mischke
,
Christof Paar
Conference:
IEEE International Workshop on HardwareOriented Security and Trust  HOST
, 2011