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Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits

Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits,10.1109/TCAD.2010.2097172,IEEE Transactions on Computer-aided

Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits   (Citations: 1)
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This paper presents a new method to automatically generate hierarchical placement rules, which are crucial for a successful analog placement. The method is based on a novel symmetry computation method, introducing the structural signal flow graph. Five types of proximity, matching and symmetry constraints are determined. According to the priority of the con- straint types, a constraint requirement graph and a hierarchical partitioning of the circuit into matching, proximity and symmetry groups is then automatically computed. Based on experimental results with a state-of-the-art placement tool, we show that the new approach generates more placement rules and can lead to better circuit performance and parametric yield according to post-layout simulation.
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