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Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors

Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors,10.1109/ISCA.2008.40,Radu Teodorescu,Josep Torrellas

Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors   (Citations: 57)
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Within-die process variation causes individual cores in a Chip Multiprocessor (CMP) to differ substantially in both static power consumed and maximum frequency supported. In this environ- ment, ignoring variation effects when scheduling applications or when managing power with Dynamic Voltage and Frequency Scal- ing (DVFS) is suboptimal. This paper proposes variation-aware algorithms for application scheduling and power management. One such power manage- ment algorithm, called LinOpt, uses linear programming to find the best voltage and frequency levels for each of the cores in the CMP — maximizing throughput at a given power budget. In a 20- core CMP, the combination of variation-aware application schedul- ing and LinOpt increases the average throughput by 12-17% and reduces the average ED2 by 30-38% — all relative to using variation-aware scheduling together with a simple extension to In- tel's Foxton power management algorithm.
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