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Low phase noise frequency synthesiser for the Trapped Atom Clock on a Chip

Low phase noise frequency synthesiser for the Trapped Atom Clock on a Chip,10.1109/FREQ.2009.5168238,F. Ramirez-Martinez,M. Lours,P. Rosenbusch,F. Rei

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Low phase noise frequency synthesiser for the Trapped Atom Clock on a Chip  
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We report on the realisation of a 6:834 GHz synthesis chain for the Trapped Atom Clock on a Chip (TACC) that is being developed at LNE-SYRTE. The stability of the chain is 10-14 at 1 s, one order of magnitude below the stability goal of TACC. This ensures that the synthesizer will not be a limiting factor of the clock performance. The chain is based on the frequency multiplication of a 100 MHz reference signal to 6:4 GHz. It uses a comb generator based on a monolithic GaAs non-linear transmission line. This is a novelty in the fabrication of high stability microwave synthesisers.
Conference: IEEE International Frequency Control Symposium - FCS , pp. 535-539, 2009
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