Register allocation for simultaneous reduction of energy and peak temperature on registers

Register allocation for simultaneous reduction of energy and peak temperature on registers,Tiantian Liu,Alex Orailoglu,Chun Jason Xue,Minming Li

Register allocation for simultaneous reduction of energy and peak temperature on registers  
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In this paper, we focus on register allocation tech- niques to simultaneously reduce energy consumption and heat buildup of register accesses. The conflict between these two objectives is resolved through the introduction of a hardware rotator. A register allocation algorithm followed by a refinement method is proposed based on the access patterns and the effects of the rotator. Experimental results show that the proposed algorithms obtain notable improvements in energy consumption and temperature reduction for embedded applications. Index Terms—Register allocation, Bit transition activity, Heat buildup, Rotator I. INTRODUCTION Energy and thermal issues are two important concerns for embedded system design. The instruction fetch logic of pro- cessors associated with register accesses makes a significant contribution towards energy consumption levels. Meanwhile, the register file has been shown to exhibit the highest tem- perature compared to the rest of the hardware components in an embedded processor (1). In this paper, we use register allocation techniques to reduce the energy consumption and heat buildup on register accesses simultaneously. Register allocation is usually performed at the end of global optimization, with the main focus being restricted to the minimization of the number of memory references. The stringent requirements for energy and thermal issues imposed by embedded systems force us to extend traditional register allocation so as to consider energy and heat requirements while preserving the minimization of memory spills. In most instruc- tion set architecture (ISA) designs, the register fields reside in fixed positions within the instruction, thus forming streams of indices on the instruction bus and to the register file address decoder (2). The number of bit transitions of these streams greatly affects the energy consumption on the instruction bus and the instruction decoder. A register allocation which min- imizes bit transitions will reduce energy consumption. While the use of the same registers frequently and consecutively can reduce bit transitions (2), it leads to thermal buildup for these heavily used registers, thus inducing hotspots on the chip. Register allocation should also balance the access distribution to avoid hotspots (3). However, this balanced access strategy may cause higher energy consumption.
Published in 2011.
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