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Reduction of source parasitic capacitance in vertical InGaAs MISFET
Reduction of source parasitic capacitance in vertical InGaAs MISFET,Yutaka Matsumoto,Hisashi Saito,Yasuyuki Miyamoto
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Reduction of source parasitic capacitance in vertical InGaAs MISFET
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Yutaka Matsumoto
,
Hisashi Saito
,
Yasuyuki Miyamoto
Published in 2011.
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