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Reset current reduction in phase-change memory cell using a thin interfacial oxide layer

Reset current reduction in phase-change memory cell using a thin interfacial oxide layer,10.1109/ESSDERC.2011.6044226,Q. Hubert,C. Jahan,A. Toffoli,L.

Reset current reduction in phase-change memory cell using a thin interfacial oxide layer  
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In this paper, the impact of a thin interfacial oxide layer on the main electrical characteristics of phase-change memory devices is investigated. Lance-type memory cells were fabricated and a thin film of TiO 2 or HfO 2 was interposed between the Ge 2Sb 2Te 5 (GST) layer and the 300nm diameter tungsten (W) contact plug. Electrical analyses were performed and a large decrease of the reset current is obtained. In particular TiO 2 and HfO 2 cells yield about 78% and 60% of current reduction respectively compared to GST reference cells. A very good endurance (>10 6 cycles) and programming window (2 orders of magnitude) were also observed. We confirm that the reset current reduction is mainly due to a decrease of the equivalent contact area and also to a better thermal efficiency.
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