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Keywords
(14)
Design Space
Design Space Exploration
Graph Theory
Multiprocessor Scheduling
Multiprocessor Systems
Optimal Solution
Performance Evaluation
Performance Improvement
Sat Solver
Satisfiability
schedulability analysis
Task Graphs
Branch and Bound
Network On Chip
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Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems
Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems,10.1109/TPDS.2010.204,IEEE Transactions on Parallel and D
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Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems
(
Citations: 2
)
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Weichen Liu
,
Zonghua Gu
,
Jiang Xu
,
Xiaowen Wu
,
Yaoyao Ye
Task graph scheduling on
multiprocessor systems
is a representative
multiprocessor scheduling
problem. A solution to this problem consists of the mapping of tasks to processors and the scheduling of tasks on each processor.
Optimal solution
can be obtained by exploring the entire
design space
of all possible mapping and scheduling choices. Since the problem is NP-hard, scalability becomes the main concern in solving the problem optimally. In this paper, a SAT-based optimization framework is proposed to address this problem, in which
SAT solver
is enhanced by integrating with a scheduling analysis tool in a
branch and bound
manner to prune the solution space efficiently.
Performance evaluation
results show that our technique has average
performance improvement
in more than an order of magnitude compared to state-of-the-art techniques. We further build a cycle-accurate network-on-chip simulator based on SystemC to verify the effectiveness of the proposed technique on realistic multiprocessor systems.
Journal:
IEEE Transactions on Parallel and Distributed Systems - TPDS
, vol. 22, no. 8, pp. 1382-1389, 2011
DOI:
10.1109/TPDS.2010.204
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Citation Context
(2)
...This scheduling strategy is proved to be more effective for multiprocessor systems [
19
]...
Weichen Liu
,
et al.
A Hardware-Software Collaborated Method for Soft-Error Tolerant MPSoC
...It is proved to be more effective for multiprocessor systems [
14
]...
Weichen Liu
,
et al.
A NoC Traffic Suite Based on Real Applications
References
(18)
A Computing Procedure for Quantification Theory
(
Citations: 1436
)
Martin Davis
,
Hilary Putnam
Journal:
Journal of The ACM - JACM
, vol. 7, no. 3, pp. 201-215, 1960
A Machine Program for Theorem Proving
(
Citations: 1551
)
Martin Davis
,
George W. Logemann
,
Donald W. Loveland
Journal:
Communications of The ACM - CACM
, vol. 5, no. 7, pp. 394-397, 1962
A decomposition-based constraint optimization approach for statically scheduling task graphs with communication delays to multiprocessors
(
Citations: 6
)
Nadathur Satish
,
Kaushik Ravindran
,
Kurt Keutzer
Conference:
Design, Automation, and Test in Europe - DATE
, pp. 57-62, 2007
Benchmarking the Task Graph Scheduling Algorithms
(
Citations: 73
)
Yu-kwong Kwok
,
Ishfaq Ahmad
Conference:
International Parallel and Distributed Processing Symposium/International Parallel Processing Symposium - IPDPS(IPPS)
, pp. 531-537, 1998
Static scheduling algorithms for allocating directed task graphs to multiprocessors
(
Citations: 411
)
Yu-Kwong Kwok
,
Ishfaq Ahmad
Journal:
ACM Computing Surveys - CSUR
, vol. 31, no. 4, pp. 406-471, 1999
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Citations
(2)
A Hardware-Software Collaborated Method for Soft-Error Tolerant MPSoC
Weichen Liu
,
Jiang Xu
,
Xuan Wang
,
Yu Wang
,
Wei Zhang
,
Yaoyao Ye
,
Xiaowen Wu
,
Mahdi Nikdast
,
Zhehui Wang
Conference:
Annual Symposium on VLSI
, pp. 260-265, 2011
A NoC Traffic Suite Based on Real Applications
Weichen Liu
,
Jiang Xu
,
Xiaowen Wu
,
Yaoyao Ye
,
Xuan Wang
,
Wei Zhang
,
Mahdi Nikdast
,
Zhehui Wang
Conference:
Annual Symposium on VLSI
, pp. 66-71, 2011