RSS for Uday Bondhugula (उदय बोंदुगुला)http://academic.research.microsoft.com/Rss.aspx?id=3565667Search RSS feed for Microsoft Academic SearchMSRA Libra RSS Burner(c)2008 Microsoft Corpration, All right reserved.Tue, 21 May 2013 12:49:18 GMTTue, 21 May 2013 12:49:18 GMTUday Bondhugula (उदय बोंदुगुला) (Personal Info) http://academic.research.microsoft.com/Author/3565667Tue, 21 May 2013 12:49:18 GMTIndian Institute of Science Bangalore

Publications: 26

Citation Count: 212

G-index: 14

Field Rating: 8

Fields of study: Distributed & Parallel Computing, Programming Languages, Hardware & Architecture

Homepage: http://www.csa.iisc.ernet.in/~uday

Permanent Link: http://academic.research.microsoft.com/Author/3565667

]]>3565905814http://www.csa.iisc.ernet.in/~udayIndian Institute of Science BangaloreLoop transformations: convexity, pruning and optimizationhttp://academic.research.microsoft.com/Publication/39276584Tue, 21 May 2013 12:49:18 GMT356566739276584Louis-Noël Pouchet, Uday Bondhugula, Cédric Bastoul, Albert Cohen, J. Ramanujam, P. Sadayappan, Nicolas Vasilache

POPL, pp. 549-562, 2011

]]>Loop transformations: convexity, pruning and optimizationhttp://academic.research.microsoft.com/Publication/39219618Tue, 21 May 2013 12:49:17 GMT356566739219618Louis-Noël Pouchet, Uday Bondhugula, Cédric Bastoul, Albert Cohen, J. Ramanujam, P. Sadayappan, Nicolas Vasilache

SIGPLAN, pp. 549-562, 2011

]]>Combined Iterative and Model-driven Optimization in an Automatic Parallelization Frameworkhttp://academic.research.microsoft.com/Publication/39239711Tue, 21 May 2013 12:49:16 GMT356566739239711Louis-Noël Pouchet, Uday Bondhugula, Cédric Bastoul, Albert Cohen, J. Ramanujam, P. Sadayappan

SC, pp. 1-11, 2010

(Citations:5)

]]>Believe it or not!: mult-core CPUs can match GPU performance for a FLOP-intensive application!http://academic.research.microsoft.com/Publication/39237834Tue, 21 May 2013 12:49:15 GMT356566739237834Rajesh Bordawekar, Uday Bondhugula, Ravi Rao

PACT, pp. 537-538, 2010

(Citations:1)

]]>A model for fusion and code motion in an automatic parallelizing compilerhttp://academic.research.microsoft.com/Publication/39237816Tue, 21 May 2013 12:49:14 GMT356566739237816Uday Bondhugula, Oktay Gunluk, Sanjeeb Dash, Lakshminarayanan Renganarayanan

PACT, pp. 343-352, 2010

(Citations:1)

]]>Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processorshttp://academic.research.microsoft.com/Publication/4728601Tue, 21 May 2013 12:49:13 GMT35656674728601Muthu Manikandan Baskaran, Nagavijayalakshmi Vydyanathan, Uday Bondhugula, J. Ramanujam, Atanas Rountev, P. Sadayappan

PPoPP, pp. 219-228, 2009

(Citations:5)

]]>Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessorshttp://academic.research.microsoft.com/Publication/6198222Tue, 21 May 2013 12:49:12 GMT35656676198222Qingda Lu, Christophe Alias, Uday Bondhugula, Thomas Henretty, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, Ponnuswamy Sadayappan, Yongjian Chen, Haibo Lin, Tin-fook Ngai

PACT, pp. 348-357, 2009

(Citations:5)

]]>Compact multi-dimensional kernel extraction for register tilinghttp://academic.research.microsoft.com/Publication/6049436Tue, 21 May 2013 12:49:11 GMT35656676049436Lakshminarayanan Renganarayana, Uday Bondhugula, Salem Derisavi, Alexandre E. Eichenberger, Kevin O'brien

SC, pp. 1-12, 2009

(Citations:1)

]]>Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processorshttp://academic.research.microsoft.com/Publication/14411141Tue, 21 May 2013 12:49:10 GMT356566714411141Muthu Manikandan Baskaran, Nagavijayalakshmi Vydyanathan, Uday Kumar Reddy Bondhugula, J. Ramanujam, Atanas Rountev, P. Sadayappan

SIGPLAN, vol. 44, no. 4, pp. 219-228, 2009

]]>A compiler framework for optimization of affine loop nests for gpgpushttp://academic.research.microsoft.com/Publication/4282249Tue, 21 May 2013 12:49:09 GMT35656674282249Muthu Manikandan Baskaran, Uday Bondhugula, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan

ICS, pp. 225-234, 2008

(Citations:34)

]]>A practical automatic polyhedral parallelizer and locality optimizerhttp://academic.research.microsoft.com/Publication/4308659Tue, 21 May 2013 12:49:08 GMT35656674308659Uday Bondhugula, Albert Hartono, J. Ramanujam, P. Sadayappan

PLDI, pp. 101-113, 2008

(Citations:33)

]]>Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memorieshttp://academic.research.microsoft.com/Publication/4309248Tue, 21 May 2013 12:49:07 GMT35656674309248Muthu Manikandan Baskaran, Uday Bondhugula, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan

PPoPP, pp. 1-10, 2008

(Citations:25)

]]>Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Modelhttp://academic.research.microsoft.com/Publication/4240667Tue, 21 May 2013 12:49:06 GMT35656674240667Uday Bondhugula, Muthu Manikandan Baskaran, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan

CC, pp. 132-146, 2008

(Citations:19)

]]>PLuTo: A Practical and Fully Automatic Polyhedral Program Optimization Systemhttp://academic.research.microsoft.com/Publication/4545717Tue, 21 May 2013 12:49:05 GMT35656674545717Uday Bondhugula, J. Ramanujam, P. Sadayappan

2008

(Citations:3)

]]>Towards effective automatic parallelization for multicore systemshttp://academic.research.microsoft.com/Publication/4288857Tue, 21 May 2013 12:49:04 GMT35656674288857Uday Bondhugula, Muthu Manikandan Baskaran, Albert Hartono, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan

IPDPS(IPPS), pp. 1-5, 2008

(Citations:1)

]]>A practical automatic polyhedral parallelizer and locality optimizerhttp://academic.research.microsoft.com/Publication/14410918Tue, 21 May 2013 12:49:03 GMT356566714410918Uday Bondhugula, Albert Hartono, J. Ramanujam, P. Sadayappan

SIGPLAN, vol. 43, no. 6, pp. 101-113, 2008

(Citations:1)

]]>Effective automatic parallelization of stencil computationshttp://academic.research.microsoft.com/Publication/2467466Tue, 21 May 2013 12:49:02 GMT35656672467466Sriram Krishnamoorthy, Muthu Manikandan Baskaran, Uday Bondhugula, J. Ramanujam, Atanas Rountev, P. Sadayappan

PLDI, pp. 235-244, 2007

(Citations:21)

]]>Automatic mapping of nested loops to FPGAShttp://academic.research.microsoft.com/Publication/2467729Tue, 21 May 2013 12:49:01 GMT35656672467729Uday Bondhugula, J. Ramanujam, P. Sadayappan

PPoPP, pp. 101-111, 2007

(Citations:6)

]]>Effective automatic parallelization of stencil computationshttp://academic.research.microsoft.com/Publication/14410747Tue, 21 May 2013 12:49:00 GMT356566714410747Sriram Krishnamoorthy, Muthu Baskaran, Uday Bondhugula, J. Ramanujam, Atanas Rountev, P. Sadayappan

SIGPLAN, vol. 42, no. 6, pp. 235-244, 2007

]]>Parallel FPGA-based all-pairs shortest-paths in a directed graphhttp://academic.research.microsoft.com/Publication/2448431Tue, 21 May 2013 12:48:59 GMT35656672448431Uday Bondhugula, Ananth Devulapalli, Joseph Fernando, Pete Wyckoff, P. Sadayappan

IPDPS(IPPS), 2006

(Citations:23)

]]>Hardware/Software Integration for FPGA-based All-Pairs Shortest-Pathshttp://academic.research.microsoft.com/Publication/2430067Tue, 21 May 2013 12:48:58 GMT35656672430067Uday Bondhugula, Ananth Devulapalli, James Dinan, Joseph Fernando, Pete Wyckoff, Eric Stahlberg, P. Sadayappan

FCCM, pp. 152-164, 2006

(Citations:6)

]]>High Performance RDMA Based All-to-All Broadcast for InfiniBand Clustershttp://academic.research.microsoft.com/Publication/2433287Tue, 21 May 2013 12:48:57 GMT35656672433287Sayantan Sur, U. K. R. Bondhugula, Amith R. Mamidala, Hyun-wook Jin, Dhabaleswar K. Panda

HiPC, pp. 148-157, 2005

(Citations:12)

]]>Affine Transformations for Communication Minimal Parallelization and Locality Optimization of Arbitrarily Nested Loop Sequenceshttp://academic.research.microsoft.com/Publication/5284499Tue, 21 May 2013 12:48:56 GMT35656675284499Uday Bondhugula, Muthu Baskaran, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan

(Citations:8)

]]>Hardware/Software Codesign for All-Pairs Shortest-Paths on a Reconfigurable Supercomputerhttp://academic.research.microsoft.com/Publication/5624170Tue, 21 May 2013 12:48:55 GMT35656675624170Uday Bondhugula, Ananth Devulapalli, James Dinan, Joseph Fernando, Pete Wyckoff, Eric Stahlberg, P. Sadayappan

(Citations:2)

]]>MolPhy06 Automatic Code Generation for Many-Body Electronic Structure Methods: Thehttp://academic.research.microsoft.com/Publication/12661481Tue, 21 May 2013 12:48:54 GMT356566712661481Alex Auer, Gerald Baumgartner, David E. Bernholdt, Alina Bibireata, Venkatesh Choppella, Daniel Cociorva, Xiaoyang Gao, R. Harrison, Sriram Krishnamoorthy, Sandhya Krishnan, Chi-Chung Lam, Marcel Noo, R. Pitzer, J. Ramanujam, P. Sadayappan, Venkatesh Chopella, S. Hirata, Qingda Lu, J. Ra, Alex Sibiryakov, Uday Bondhugula, Atanas Roun

]]>A Compiler Framework for Optimization of Affine Loop Nests for General Purpose Computations on GPUshttp://academic.research.microsoft.com/Publication/4802120Tue, 21 May 2013 12:48:53 GMT35656674802120Muthu Manikandan Baskaran, Uday Bondhugula, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan

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