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...modified and extended. however, providing a precise exception model for a self-timed micropipelined processor can be difficult, since the processor state does not change at uniformly discrete intervals. we present a precise exception method implemented for fred, a self-timed, decoupled, pipelined computer architecture with...
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...fied and extended. however, providing a precise exception model for a self-timed micropipelined processor can be difficult, since the processor state does not change at uni- formly discrete intervals. we present a precise exception method implemented for fred, a self-timed, decoupled, pipelined computer architecture with...
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self-timed processor designs offer several advantages over...is an example of such a design approach. the self-timed design philosophy results in a powerful and flexible architecture which...
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...research efforts have proposed mechanisms for precise exception handling, but it is difficult to achieve precise exception handling in minimal area as required...memory systems. this paper presents a correct and efficient exception handling scheme with a modest hardware resource. the presented idea maintains precise exception handling in the case of discrete...
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...in general not meaningful to a user of such a word processor. another example is a flight reservation system. such a system runs over a very long period of time...is not possible to give a precise definition of when a computational state should be classified as an exception occurrence; this is a decision for the programmer. in practice, most...
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...reliable op- erating systems. using exceptions to notify system components about exceptional conditions also reduces coupling of error handling code and increasesthemodularityofthesystem.weexplorethebenefltsofincor- porating exception handling into the choices operating system...through the use of an exception hierarchy. we also describe a catch-rethrow approach for exception propagation across protection domains. when an exception is caught by the system...
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...and may be ideally suited for constructing decoupled computer architectures. fred is a self-timed decoupled, pipelined computer architecture based...fred, with specific details on a micropipelined implementation that includes support for multiple functional units and out-of-order instruction completion due to the self-timed decoupling...
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...this paper describes the precise exception model of the mc88110 symmetric superscalar microprocessor. the mc88110 is a superscalar, pipelined processor that contains multiple exection units...architecturally correct state to an exception handling routine in a manner that minimizes exception response latency. the interrupt latency timings in the mc88110 are described...
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...addition, we also minimize the exception handling overhead for frequently thrown exceptions by jumping directly from the exception throwing point into the exception handler through a technique called exception handler prediction. experiments show that the existence of exception handlers indeed does not interfere...
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...amulet3 is a fully asynchronous implementation of arm...such as the introduction of a reorder buffer to support efficient forwarding while retaining exact exception handling. in this paper we present...